Exemplary embodiments of the present invention relate to a data pre-fetch apparatus and method, and more particularly, to an apparatus and method for pre-fetching and processing data according to processing capacity of a data processor.
In general, an operating speed of an electronic device such as a computer depends on a processing speed of a central processing unit (CPU). Since a processing speed of peripheral devices inside an electronic device is relatively slow compared with a processing speed of a CPU, a cache memory may be used to increase an operating speed of an electronic device.
If data is read from a hard disk each time a program is executed by a CPU, an overall processing speed of an electronic device is lowered because a processing speed of the hard disk is relatively slow compared with the CPU. Hence, a temporary memory is provided between a random access memory (RAM) and a CPU. Contents/data inputted to the RAM when a program is initially executed are stored in the temporary memory, and the CPU reads data or corresponding codes from the temporary memory. In this manner, a data read time may be shortened.
Meanwhile, electronic devices such as a computer may use an 8-bit core, that is, an 8-bit CPU. In this case, if a cache memory is applied to the 8-bit core in order to increase a data processing speed, a manufacturing cost of a product may be increased due to factors such as a chip size and a chip cost, thereby weakening the competitiveness of the product in the market. That is, although the processing speed of the product increases, the marketability of the product may be degraded since the price thereof is increased.